Bharghava Rajaram Associate Professor Department of Electrical & Electronics Engineering

Dr. Bharghava Rajaram is an Associate Professor in the Electrical and Electronics Engineering Department at Mahindra University École Centrale School of Engineering. Dr. Bharghava did his Ph.D. in Computing Systems Architecture from University of Edinburgh, Scotland, United Kingdom.

Prior to joining MU, he was an Assistant Professor (Sr.) at VIT University, Chennai. At VIT, his primary work included teaching, guiding projects, and research work. He also headed the Emebedded Systems Research Group and was an in-charge of the Internet-of-Things (IoT) Lab. Bharghava's research interests include High Performance Computing, Computer Architecture and Embedded System Design.

  • Education
    • July 2015 - Ph.D. in Computing Systems Architecture University of Edinburgh, Scotland, United Kingdom Thesis: “Efficient, Scalable, and Fair Read-Modify-Writes” ; Advisor: Dr. Vijayanand Nagarajan
    • July 2010 - M.S. (by Research) in VLSI and Embedded Systems International Institute of Information Technology - Hyderabad, India Thesis: “Design of Low Power Applications using Inexact Logic Circuits” ; Advisors: Prof. Govindarajulu Regeti, Dr. Suresh Purini, Cgpa: 8.95/30
    • May 2007- B.E. in Electronics and Communication Engineering SSN College of Engineering (affiliated to Anna University), India FYP: “Study of Reversible Logic Circuits for Zero power System Design” ; Advisor: Dr. Kanchana Bhaaskaran, Percentage: 85% (3rd to 8th semester)
  • Research
    • High Performance Computing: FPGA based HPC, performance optimizations
    • Computer Architecture : microarchitecture, CMPs, heterogeneous architectures
    • Embedded System Design: Low power System Design, Internet of Things, Smart Sensors
  • Awards
    • Coordinated VIT Chennai ENACUTS Chapter to a Rs. 50,000 grant from KPMG, and Rs. 20,000 grant for Walmart for Social Entrepreneurship.
    • Guided Student Riteish Pandey to win the Odisha Youth Innovation Fund grant of Rs. 50,000
    • Awarded the Intel EU PhD Fellowship for 2012-2013. 2nd best poster at ASPLOS 2012. Title: ”FastR: Fast RMWs for TSO”
    • Institute for Computing Systems Architecture (ICSA) Studentship (2010-2013), University of Edinburgh
    • Joint Winners of the Intel India Scholar Program (formerly Intel India Research Challenge) 2009
    • Center for VLSI and Embedded Systems Technologies (CVEST) Studentship (2007-2010), International Institute of Information Technology, Hyderabad.
    • Organized IEEE All India Students Congress 2007 as the Chairman of SSNCE’s IEEE Student Chapter.
    • Chosen as part of a 11 member delegation by the IEEE India Council to repre-sent India at the R10 IEEE Student Congress in China, 2006.
    • SSN Undergraduate Merit Scholarship providing full tuition waiver; awarded to the Top 10 out of 130 students in the Electronics Engineering program for outstanding academic performance - 2003-06
  • Publications
    • Vishal Reddy Gade, Ashish Soni, Bhargava Rajaram, Deep Seth (2020) Semi-Autonomous Collaborative Mobile Platform with Pre-Diagnostics for Hospitals. HCI International 2020.
    • Udatha L., Pasupuleti V.D.K., Rajaram B. (2020) Structural Health Monitoring from Human-Induced Vibrations Using Accelerometer Sensors. In: Babu K., Rao H., Amarnath Y. (eds) Emerging Trends in Civil Engineering. Lecture Notes in Civil Engineering, vol 61. Springer, Singapore.
    • Abhinav Kolla, Aditya Verma, Dileep Kumar Pasupuletti, Prafull Kalaputapu, Bharghava Rajaram. DisCom: A Robust Post-Disaster Communication Infrastructure. Urban Safety of Mega Cities in Asia (USMCA) 2019, Hyderabad.
    • Daka, Trishala & Udatha, Lokesh & Pasupuleti, Venkata & Kalapatapu, Prafulla & Rajaram, Bharghava. (2018). Ancient Sandbox Technique: An Experimental Study Using Piezoelectric Sensors: 7th International Conference, EuroMed 2018, Nicosia, Cyprus, October 29 – November 3, 2018.
    • Kamalhas T, Sakshi Singh, Akinepalli Varsha Rao, Bharghava Rajaram. Age and Gender Estimation using Random Forests for Social Robots. ICMLDS 2018.
    • Vinayak Garg, Anish Mukherjee and Bharghava Rajaram, "Classifying human-robot interaction using handshake data," 2017 IEEE International Conference on Systems, Man, and Cybernetics (SMC), Banff, AB, 2017, pp. 3153-3158, doi: 10.1109/SMC.2017.8123112.
    • Francis F., Vishnu P.L., Jha M., Rajaram B. (2018) IOT-Based Automated Aeroponics System. In: Thalmann D., Subhashini N., Mohanaprasad K., Murugan M. (eds) Intelligent Embedded Systems. Lecture Notes in Electrical Engineering, vol 492. Springer, Singapore.
    • Bharghava Rajaram, Vijay Nagarajan, Susmit Sarkar, Marco Elver: Fast RMWs for TSO: semantics and implementation. PLDI 2013: 61-72.
    • Bharghava Rajaram, Vijay Nagarajan, Andrew J. McPherson, Marcelo Cintra: Su-perCoP: a general, correct, and performance-ecient supervised memory system. Conf. Computing Frontiers 2012.
    • Changhui Lin, Vijay Nagarajan, Rajiv Gupta, Bharghava Rajaram: Ecient sequen-tial consistency via conict ordering. ASPLOS 2012: 273-286.
    • Bharghava Rajaram, Abinesh Ramachandran, Suresh Purini, R. Govindarajulu: De-sign of Low Power Systems Using Inexact Logic Circuits. Journal of Low Power Electronics 6(3): 401-414.
    • Bharghava Rajaram, Abinesh R, Suresh Purini, Govindarajulu Regeti: Inexact De-cision Circuits: An Application to Hamming Weight Threshold Voting. VLSI Design 2010: 158- 163.
    • Abinesh R, Bharghava Rajaram, Suresh Purini, Govindarajulu Regeti: Transition Inversion Based Low Power Data Coding Scheme for Buered Data Transfer. VLSI Design 2010: 164-169.
    • Abinesh Ramachandran, Bharghava Rajaram, Mandalika B. Srinivas: Transition In-version Based Low Power Data Coding Scheme for Synchronous Serial Communica-tion. ISVLSI 2009: 103-108.
    • Bharghava Rajaram, Jyothish Soman, K S Rajan: Applicability and Performance of Cell BE as a Mobile GIS High Performance Platform. Joint International Workshop of ISPRS on Geospatial Data Cyber Infrastructure and Real-time Services 2009.
    • Uma Rajaram, Raja Paul Perinbam, Bharghava Rajaram: EHW Architecture for Design of FIR Filters for Adaptive Noise Cancellation. International Journal of Com-puter Science and Network Security, Vol. 9 No. 1 pp. 41-48.
  • Experience
    • JUNE 2015 to JULY 2017  - Assistant Professor (Sr.) at VIT University, Chennai Embedded Systems Research Group Chair
    • Primary work includes teaching, guiding projects, and research work. Currently heading the Emebedded Systems Research Group, in-charge of the Internet-of-Things (IoT) Lab. Is Rapporteur of the Department of Telecom’s Working group on Smart Villages and Agriculture. Part of Board of Studies for the School of Electronics Engineering, and in the syllabus committee for B.Tech. and M.Tech. courses. Co-chair for the Intelligent Embedded Systems Symposia as part of the International Conference of NextGen Electronic Technologies: Silicon to Software.
    • October 2010 - October 2014 - Graduate Student,Institute of Computing Systems Architecture, University of Edinburgh
    • Primary work includes research work, and guiding master’s students. Was the organizer for the reading group for our research group. Was awarded the Intel EU PhD Fellowship in the year 2012-13. Student Volunteer for ACM PLDI 2015 and ACM PACT 2014. Teaching assistant for Computer Architecture (Spring 2012), Parallel Architectures (Fall 2013).
    • Jun 2007 to May 2010 - Graduate Student, International Institute of Information Technology - Hyderabad, India
    • Primary work included master’s dissertation, and guiding undergraduates student projects. Worked on several embedded system modules (including heart rate monitors, wireless sensor nodes, low power PC mouse) using Cypress PSoC, as part of a collaborative eort with Cypress Semiconductors. Was also resource person for workshops organized by Cypress Semiconductors. Server administrator for the Cell Bladeserver donated by IBM, and an UltraSPARC T2 server hosting Synopsys EDA tools donated by NVIDIA. Teaching assistant for Microprocessor based System Design (Fall 2008), Multicore Architectures (Spring 2009), Computer Architecture (Fall 2009).

    Professional Experience:

    Feb to July 2010 - Intern at Xilinx Research Labs, Xilinx Inc., Hyderabad, India, Advisor: Dr. Chidamber Kulkarni
    Worked on High level Synthesis of Network Stacks (Ip router, MPLS Router) targeted at NetFPGA, and Xilinx EPP. Also aided in a preliminary communication model for accelerating applications on Xilinx EPP